Computer Architectures

Објавено: June 28, 2022
1. Course Title Computer Architectures
2. Code 4ФЕИТ07Л005
3. Study program КТИ,КСИАР,КХИЕ
4. Organizer of the study program (unit, institute, department) Faculty of Electrical Engineering and Information Technologies
5. Degree (first, second, third cycle) First cycle
6. Academic year/semester II/4, III/6 7. Number of ECTS credits 6
8. Lecturer D-r Danijela Efnusheva
9. Course Prerequisites Taken course: Logic Design
10. Course Goals (acquired competencies): Introduction to the basic concepts of computer architectures and computer systems organization: processor control and data path, arithmetical-logical unit, pipelining, communication with I/O devices, instruction set architecture, memory hierarchy (registers, cache memory, main memory, secondary memory), and virtual memory. Upon completion of the course students will be able to:
– understand and use the elements of computer architectures;
– understand arithmetic with integers and real numbers in computer system;
– understand instruction set architecture and ability for assembly processor programming;
-understand pipeline instruction execution;
– understand the operation of control and data path in processor;
– understand different levels of memory hierarchy and performance analysis;
11. Course Syllabus: Introduction to computer architectures. Definition of organization of computers and different implementations of computers. Performance of computers and processors. Defining constituents of computer systems. Instructions: computer language. Addressing modes. Operations and operands. Signed and unsigned numbers. Arithmetic for computers: addition, subtraction, multiplication, division. Floating-point representation of numbers. Floating-point arithmetic. Architecture of MIPS processor. Data path: a simple implementation scheme. Instructions pipelining (fetch, decode, execute, memory and write-back). Pipeline data and control path of MIPS. Introduction to data and control hazards. Exceptions. Parallelization of instructions. Memory hierarchy. Memory technologies. Basics of cache memory. Types of cache memory mappings. Cache memory performances. Virtual memory. Paging. Page tables. TLB buffer. Virtual memory performances.
12. Learning methods: Lectures, tasks and exercises and laboratory practice
13. Total number of course hours 2 + 2 + 1 + 0
14. Distribution of course hours 180
15. Forms of teaching 15.1. Lectures-theoretical teaching 30
15.2. Exercises (laboratory, practice classes), seminars, teamwork 45
16. Other course activities 16.1. Projects, seminar papers 0
16.2. Individual tasks 25
16.3. Homework and self-learning 80
17. Grading 17.1. Exams 0
17.2. Seminar work/project (presentation: written and oral) 0
17.3. Activity and participation 10
17.4. Final exam 90
18. Grading criteria (points) up to 50 points 5 (five) (F)
from 51to 60 points 6 (six) (E)
from 61to 70 points 7 (seven) (D)
from 71to 80 points 8 (eight) (C)
from 81to 90 points 9 (nine) (B)
from 91to 100 points 10 (ten) (A)
19. Conditions for acquiring teacher’s signature and for taking final exam Practical (laboratory) exercises
20. Forms of assessment Two partial exams during the semester with a duration of 150 minutes each or one final exam in a corresponding exam session with a duration of 150 minutes (110 minutes for practical part and 40 minutes for theoretical part). The laboratory exercises are also graded. The final grade includes points from the exam and the laboratory exercises.
It is not allowed to use books, scripts, manuscripts or notes of any kind during the exam, as well as a calculator, mobile phone, tablet or any other electronic device.
21. Language Macedonian and English
22. Method of monitoring of teaching quality Self-evaluation and questionnaires
23. Literature
23.1. Required Literature
No. Author Title Publisher Year
1 D.A. Patterson, J. L. Hennessy Computer Organization and Design: The Hardware/Software Interface, 5th Ed. Morgan Kaufmann 2014
2 D.A. Patterson, J. L. Hennessy Computer Organization and Design The Hardware/Software Interface: RISC-V Edition Morgan Kaufmann 2018
3 Ендрју С. Таненбаум Структурирана компјутерска организација превод влада 2012
23.2. Additional Literature
No. Author Title Publisher Year
1 Џон Л. Хенеси, Дејвид А. Петерсон Компјутерска архитектура превод влада 2011
2 W. Stallings Computer Organization and Architecture 11th Ed Pearson 2019