Katerina Raleva

E-mail catherin@feit.ukim.edu.mk

KATERINA RALEVA

Full Professor  (Редовен професор)

Institute of Electronics (Институт за електроника) Електроника

Phone: +389 3 3099 103

FAX: +389 2 3064 262

e-mail: catherin@feit.ukim.edu.mk

 

EDUCATION (ОБРАЗОВАНИЕ)

2008, Ph. D in Electrical Engineering, Ss. Cyril and Methodius University – Skopje, Republic of Macedonia. (Ph. D Thesis Title: Modeling Thermal Effects in Deep Sub-micrometer SOI Devices, June, 2008)

2002, M.Sc. in Electrical Engineering, Ss. Cyril and Methodius University, Skopje, Republic of Macedonia. (M.S. Thesis: Modeling Power PIN Diode, January, 2002)

1991, B.Sc. in Electrical Engineering (Dipl. Eng.), Ss Cyril and Methodius University, Skopje, Republic of Macedonia, (Diploma equivalent to MS in USA).

 

RESEARCH OF INTERESTS (ПОЛЕ НА ИСТРАЖУВАЊЕ):

Physics of Semiconductor Devices, Semiconductor Device Modeling, Monte-Carlo Particle Based Device Simulation, Electronic Circuits Simulations, Micro- and Nanotechnology, Micro- and Nanoelectronics, VLSI Design on FPGA, Hardware-Description Languages (VHDL).

BOOKS AND BOOK CHAPTERS (ОБЈАВЕНИ КНИГИ И ПОГЛАВЈА ОД КНИГИ):

  1. Raleva, D. Vasileska, A. Shaik and S.M. Goodnick, Modeling Heating Effects in Nanoscale Devices, a book published in August, 2017. Publisher: Morgan & Claypool. (http://iopscience.iop.org/book/978-1-6817-4123-9)
  2. Katerina Raleva, Abdul R. Shaik, Raghuraj Hathwar, Akash Laturia, Suleman S. Qazi, Robin Daugherty, Dragica Vasileska and Stephen M. Goodnick, “Monte Carlo Device Simulations”, a book chapter (Book: “Handbook of Optoelectronic Device Modeling and Simulation”, Editor: Joachim Piprek), Publisher: Taylor & Francis (November, 2017)
  3. Katerina Raleva, Abdul Rawoof Shaik, Suleman Sami Qazi, Robin Daugherty, Akash Laturia, Ben Kaczer, Eric Bury and Dragica Vasileska, “Modeling Self-Heating Effects in Nanoscale Devices” – a book chapter (Book: “Nanophotonics: Thermal Energy Generation, Transport and Conversion at the Nanoscale” Editor: Zlatan Aksamija), Publisher: Pan Stanford Publishing (2017).
  4. Dragica Vasileska, Katerina Raleva, Stephen M. Goodnick, Christian Ringhofer, Shaikh S. Ahmed, Nabil Ashraf, Arif Hossain, Raghuraj Hathwar, Ashwin Ashok, Balaji Padmanabhan, Monte Carlo Device Simulation, an electronic book: “Nanohub Resources on Monte Carlo Device Simulations Study”, Publisher: http://www.nanohub.org/resources/10579/download, Editors: Nanohub Research Professionals, pp.1-76
  5. Arif Hossain, Dragica Vasileska, Katerina Raleva and Stephen M. Goodnick “Interplay of Self-Heating and Short-Range Coulomb Interactions Due to Traps in a 10 nm Channel Length Nanowire Transistor”, a book chapter (56) (Book “Nanoelectronic Device Applications Handbook (Devices, Circuits and Systems)”, Publisher: Taylor and Francis Group (CRC Press) (June, 2013).
  6. D. Vasileska, K. Raleva, S. M. Goodnick, “Monte Carlo Device Simulations”, a chapter (Book “Appications of Monte Carlo Method in Science and Engineering”, Editor: Shaul Mordechai), ISBN: 978-953-307-691-1, Publisher: InTech, (February, 2011).
  7. D. Vasileska, K. Raleva and S. M. Goodnick, “Heating Effects in Nanoscale Devices”, – a book chapter (Book: “Cutting Edge Nanotechnology”, ISBN 978-953-7619-X-X), Publisher: IN-TECH (2009).

PUBLICATIONS IN SCIENTIFIC JOURNAL WITH IMPACT FACTOR (ПУБЛИКАЦИИ ВО НАУЧНИ СПИСАНИЈА СО ФАКТОР НА ВЛИЈАНИЕ):

  1. M. Mohamed, K. Raleva, U. Ravaioli, D. Vasileska and Z. Aksamija, “Phonon Dissipation in Nanostructured Semiconductor Devices”, IEEE Nanotechnology Magazine, PP (99):1-1, June, 2019.
  2. Dragica Vasileska and Katerina Raleva, “Special Issue: electrothermal and thermoelectric modeling of nanoscale devices”, Journal of Computational Electronics, 15:1-2, 2016.
  3. K. Raleva and D.Vasileska, “The importance of thermal conductivity modeling for simulations of self-heating effects in FD SOI Devices”, Journal of Computational Electronics, Volume 12, Number 4, pp. 601-610(10), December 2013.
  4. K. Raleva, D. Vasileska, A. Hossain, S.-K. Yoo and S.M Goodnick “Study of Self-Heating Effects in SOI and Conventional MOSFETs with Electro-Thermal Particle-Based Device Simulator”, Journal of Computational Electronics, 2012 JCEL Vol.11, No.1, pp-106-117, 2012.
  5. Danijela Efnusheva, Josif Kjosev, and Katerina Raleva, “Exploring the use of Cadence IC in education”, ELECTRONICS, Vol. 17, No. 2, December, 2013.
  6. D. Vasileska, K. Raleva, A. Hossain and S. M. Goodnick, “Current progress in modeling self-heating effects in FD SOI devices and nanowire transistors”, Journal of Computational Electronics, Volume 11, Issue 3, Page 238-24, 2012.
  7. D. Vasileska, A. Hossain, K. Raleva and S. M. Goodnick, “The Role of the Source and Drain Contacts on Self-Heating Effect in Nanowire Transistors”, Journal of Computational Electronics, Vol.9, Numbers 3 and 4, pp.180-186, December, 2010. DOI: 10.1007/s10825-010-0334-7, 2010.
  8. D. Vasileska, A. Hossain, K. Raleva, Z. Aksamija, I. Knezevic, “Is Self-Heating Effects Important in Nanowire FETs?”, Numerical Methods and Applications Conference, Borovetz, August 20-24, 2010. Published in Lecture Notes in Computer Science, Volume 6046, pp. 118-124, Publisher: Springer, 2011.
  9. Katerina Raleva, Dragica Vasileska, Zlatan Aksamija, “Modeling Thermal Effects in Fully-Depleted SOI Devices with Arbitrary Crystallographic Orientation”, Borovetz, August 20-24, 2010. Published in Lecture Notes in Computer Science, Volume 6046, pp. 103-109. Publisher: Springer, 2011.
  10. Dragica Vasileska, Katerina Raleva, Stephen M Goodnick, “Electrothermal Studies of FD-SOI Devices That Utilize a New Theoretical Model for the Temperature and Thickness Dependence of the Thermal Conductivity”, IEEE Transactions on Electron Devices, Vol. 57, No. 3, pp.726-728, March 2010.
  11. Atanassov, T.Gurov, A.Karaivanova, M.Nedjalkov, D.Vasileska and K. Raleva, “Electron–phonon interaction in nanowires: A Monte Carlo study of the effect of the field”, Mathematics and Computers In Simulations, Copyright © 2009 IMACS Published by Elsevier Ltd.
  12. Dragica Vasileska, Katerina Raleva, Stephen M Goodnick, “Self-Heating Effects in Nano-Scale FD SOI Devices: The Role of the Substrate, Boundary Conditions at Various Interfaces and the Dielectric Material Type for the BOX”, IEEE Transactions on Electron Devices, 56, Issue 12, pp.3062-3071, December, 2009.
  13. (invited paper) Vasileska, K. Raleva and S. M. Goodnick, “Thermal Effects in Fully-Depleted SOI Devices”, ECS Transactions, Vol. 23 (1), 337, 2009.
  14. K. Raleva, D. Vasileska, S. M. Goodnick and M. Nedjalkov, “Modeling thermal effects in nano-devices”, IEEE Transactions on Electron Devices, Vol. 55, Issue 6, pp.1306-1316, June 2008.
  15. Raleva, D. Vasileska, S. M. Goodnick and T. Dzekov, “Modeling thermal effects in nano-devices”, Journal of Computational Electronics,Vol. 7, pp. 226-230, 2008.
  16. Katerina Raleva, Dragica Vasileska, and Stephen M. Goodnick,”Is SOD Technology the Solution to Heating Problems in SOI Devices?”, IEEE Electron Device Letters, 29, No.6, pp. 621-624, June 2008.
  17. Dragica Vasileska, Katerina Raleva and Stephen M. Goodnick, “Modeling Heating Effects in Nanoscale Devices: The Presence and the Future”, a review paper for Journal of Computational Electronics, DOI 10.1007/s10825-008-0254-y, 2008.
  18. Vasileska, D.Mamaluy, H.R. Khan, K. Raleva and S.M. Goodnick, “Semiconductor Device Modeling”, Journal of Computational and Theoretical Nanoscience, Volume 5, No. 6 pp. 997 – 1191, June 2008.
  19. K. Raleva, D. Vasileska, S. M. Goodnick and T. Dzekov, “Modeling thermal effects in nano-devices”, Journal of Computational Electronics, DOI 10.1007/s10825-008-0189-32008, 2008.
COLLABORATORS AND OTHER AFFILIATIONS

A. Collaborators:

  • D. Vasileska (ASU), S. M. Goodnick (ASU, Tempe, AZ), M. Nedjalkov (TU Vienna, Austria) S. Schintke (HEIG-VD, Switzerland), S. Tzanova (TU-Sofia, Bulgaria), G. Stojanovic (University of Novi Sad, Serbia).

B. Graduate and Doctoral Advisors

  • Dragica Vasileska, Arizona State University (PhD Co-Advisor) and Tomislav Dzhekov, UKIM, Macedonia (PhD Advisor)