Efnusheva Danijela

E-mail danijela@feit.ukim.edu.mk
Phone + 389 2 3099 177

Work experience

Head of Computer Technologies and Engineering Laboratory (since February 2020)
Assistant Professor (since March 2018)
Teaching and Research Assistant (October 2014 – February 2017)
Junior Teaching and Research Assistant (February 2009 – September 2013)

Education

Ph.D. in Technical Sciences, specialization: Electrical Engineering and Information Technologies (December 2011 – December 2017, University “Ss. Cyril and Methodius”, Faculty of Electrical Engineering and Information Technologies, Skopje, R. Macedonia)
Ph.D. thesis: “Design and practical implementation of RISC-based memory-centric processor
architecture and its application”, average grade 10.00

Master of Electrical Engineering and Information Technologies, Specialization: Computer Networks and E-technologies (October 2008 – June 2010, University “Ss. Cyril and Methodius”, Faculty of Electrical Engineering and Information Technologies, Skopje, R. Macedonia)
Master thesis: “Network processor architecture design for multi-gigabit processing”, average grade 10.00

Bachelor of Electrical Engineering and Information Technologies, Specialization: Informatics and Computer Engineering (October 2004 – September 2008)

Institute

Computer Science and Computer Engineering

Published Papers

  1. Marija Gjosheva, Zlate Bogoevski, Zdravko Todorov and Danijela Efnusheva, “IoT System for Monitoring Quality of Water”, Proceedings of International Conference on Applied Innovations in IT, Volume 10, Issue 1, Koethen, Germany, March, 2022, pp 29-36, DOI:10.25673/76929.
  2. Martina Shushlevska, Danijela Efnusheva, Goran Jakimovski, Zdravko Todorov, “Anomaly detection with various machine learning classification techniques over UNSW-NB15 dataset”, Proceedings of International Conference on Applied Innovations in IT, Volume 10, Issue 1, Koethen, Germany, March, 2022, pp. 21-27, DOI:10.25673/76928.
  3. Anastasiia Sapeha, Aleksandra Zlatkova, Marija Poposka, Filip Donchevski, Kirill Karpov, Zdravko Todorov, Danijela Efnusheva, Zhivko Kokolanski, Andrej Sarjas, Dusan Gleich, Marija Kalendar, Eduard Siemens, “Learning management systems as a platform for deployment of remote and virtual laboratory environments”, Proceedings of International Conference on Applied Innovations in IT, Volume 10, Issue 1, Koethen, Germany, March, 2022, pp: 133-142, DOI:10.25673/76944.
  4. Senchuk, A. Cholakoska, D. Efnusheva, “Analysis of Smart Home Security by Applying Machine Learning Algorithms”, Proceedings of XV International Conference ETAI 2021, Macedonia, September, 2021.
  5. Shushlevska, A. Cholakoska, D. Efnusheva, “Network Security Analysis by Applying Machine Learning Algorithms”, Proceedings of XV International Conference ETAI 2021, Macedonia, September, 2021.
  6. Todorov, D. Efnusheva and T. Nikolić, “FPGA Implementation of Computer Network Security Protection with Machine Learning,” 2021 IEEE 32nd International Conference on Microelectronics (MIEL), 2021, pp. 263-266, doi: 10.1109/MIEL52794.2021.9569201.
  7. Cholakoska A., Shushlevska M., Todorov Z., Efnusheva D. (2021) “Analysis of Machine Learning Classification Techniques for Anomaly Detection with NSL-KDD Data Set”. In: Silhavy R., Silhavy P., Prokopova Z. (eds) Data Science and Intelligent Systems. CoMeSySo 2021. Lecture Notes in Networks and Systems, vol 231. Springer, Cham. https://doi.org/10.1007/978-3-030-90321-3_21.
  8. Cholakoska A., Karanfilovska M., Efnusheva D. (2021) “Survey of Security Issues, Requirements, Challenges and Attacks in Internet of Things”. In: Silhavy R. (eds) Informatics and Cybernetics in Intelligent Systems. CSOC 2021. Lecture Notes in Networks and Systems, vol 228. Springer, Cham. https://doi.org/10.1007/978-3-030-77448-6_55
  9. Zdravko Todorov, Danijela Efnusheva, Ana Cholakoska, Marija Kalendar, “FPGA implementation of IPv6 header processor”, Proceedings of International Conference on Applied Innovations in IT, Volume 9, Issue 1, Koethen, Germany, March, 2021, pp. 1-6, DOI:10.25673/36577.
  10. Efnusheva D. (2020) “Performance Evaluation of RISC-Based Memory-Centric Processor Architecture”. In: Silhavy R. (eds) Applied Informatics and Cybernetics in Intelligent Systems. CSOC 2020. Advances in Intelligent Systems and Computing, vol 1226. Springer, Cham. https://doi.org/10.1007/978-3-030-51974-2_13.
  11. Aleksandar Trenchevski, Marija Kalendar, Hristijan Gjoreski, Danijela Efnusheva, “Prediction of Air Pollution Concentration Using Weather Data and Regression Models”, Proceedings of International Conference on Applied Innovations in IT, Volume 8, Issue 1, Koethen, Germany, March, 2020, pp. 55-61, DOI:10.25673/32749.
  12. Danijela Efnusheva, Ana Cholakoska, Marija Kalendar, “FPGA design of IP packet filter based on SNORT rules”, Proceedings of 10th International Conference on Information Society and Technology – ICIST 2020, Kopaonik, Serbia, March, 2020.
  13. Efnusheva D. (2019) “Performance Evaluation of Hardware Unit for Fast IP Packet Header Parsing”. In: Silhavy R., Silhavy P., Prokopova Z. (eds) Intelligent Systems Applications in Software Engineering. CoMeSySo 2019 2019. Advances in Intelligent Systems and Computing, vol 1046. Springer, Cham. https://doi.org/10.1007/978-3-030-30329-7_14.
  14. Danijela Efnusheva, “FPGA Implementation of RISC-based Memory-centric Processor Architecture” International Journal of Advanced Computer Science and Applications(IJACSA), 10(9), 2019. http://dx.doi.org/10.14569/IJACSA.2019.0100902.
  15. Ana Cholakoska, Danijela Efnusheva, Marija Kalendar, “Hardware Implementation of IP Packet Filtering in FPGA”, Proceedings of International Conference on Applied Innovation in IT, Volume 7, Issue 1, Koethen, Germany, March 2019, pp. 23-29., DOI:10.25673/13478.
  16. Dejan Vasilevski, Ana Cholakoska, Marija Kalendar, Danijela Efnusheva, “Managing real time IoT data with cloud computing services”, Proceedings of XIV International Conference ETAI 2018, Struga, Macedonia, September, 2018.
  17. Danijela Efnusheva, Ana Cholakoska, Aristotel Tentov, “A survey of different approaches for overcoming the processor-memory bottleneck”, International Journal of Computer Science & Information Technology, Vol 9, No. 2, April 2017, DOI: 10.5121/ijcsit.2017.9214.
  18. Efnusheva D., Tentov A. (2017) “Design of Processor in Memory with RISC-modified Memory-Centric Architecture”. In: Silhavy R., Senkerik R., Kominkova Oplatkova Z., Prokopova Z., Silhavy P. (eds) Cybernetics and Mathematics Applications in Intelligent Systems. CSOC 2017. Advances in Intelligent Systems and Computing, vol 574. Springer, Cham. https://doi.org/10.1007/978-3-319-57264-2_7.
  19. Danijela Efnusheva, Aristotel Tentov, Ana Cholakoska, Marija Kalendar, “FPGA Implementation of IP Packet Header Parsing Hardware”, Proceedings of Fifth International Conference on Applied Innovations in IT, Volume 5, Issue 1, Koethen, Germany, March 2017, pp. 33-40, DOI:10.13142/KT10005.05.
  20. Danijela Efnusheva, Ana Cholakoska, Aristotel Tentov, “Design of Reconfigurable Memory for Fast Network Packet Header Parsing”, Proceedings of 7th International Conference on Information Society and Technology – ICIST 2017, Kopaonik, Serbia, March, 2017.
  21. Efnusheva, G. Dokoski, A. Tentov and M. Kalendar, “Memory-centric approach of network processing in a modified RISC-based processing core,” 2016 Future Technologies Conference (FTC), 2016, pp. 1181-1188, doi: 10.1109/FTC.2016.7821751.
  22. Danijela Efnusheva, Marija Kalendar, Aristotel Tentov, Goce Dokoski, “A modified memory-centric approach for network packet processing”, Proceedings of XIII International Conference ETAI 2016, Ohrid, Macedonia, September, 2016.
  23. Danijela Efnusheva, Goce Dokoski, Aristotel Tentov, Marija Kalendar, “Design of Novel Memory-centric Architecture and Organization of Processors”, Proceedings of XII International Conference ETAI 2015, Ohrid, Macedonia, September 24-26, 2015, pp. EI-4.
  24. Goce Dokoski, Danijela Efnusheva, Aristotel Tentov, Marija Kalendar, “Software Support Environment for Novel Memory-cenric Processor Architecture”, Proceedings of XII International Conference ETAI 2015, Ohrid, Macedonia, September 24-26, 2015, pp. EI-4.
  25. Danijela Efnusheva, Goce Dokoski, Aristotel Tentov, Marija Kalendar, “A novel memory-centric architecture and organization of processors and computers”, Proceedings of Third International Conference on Applied Innovations in IT, Volume 3, Issue 1, Koethen, Germany, March 19, 2015, pp. 47-53, DOI:10.13142/kt10003.09.
  26. Goce Dokoski, Danijela Efnusheva, Aristotel Tentov, Marija Kalendar, “Software for explicitly parallel memory-centric processor architecture”, Proceedings of Third International Conference on Applied Innovations in IT, Volume 3, Issue 1, Koethen, Germany, March 19, 2015, pp. 37-40, DOI:10.13142/kt10003.07.
  27. Efnusheva D., Tentov A., Tagasovska N. (2015) “An Efficient 64-Point IFFT Hardware Module Design”. In: Elleithy K., Sobh T. (eds) New Trends in Networking, Computing, E-learning, Systems Sciences, and Engineering. Lecture Notes in Electrical Engineering, vol 312. Springer, Cham. https://doi.org/10.1007/978-3-319-06764-3_59.
  28. Tagasovska N., Grnarova P., Tentov A., Efnusheva D. (2015) “Performances of LEON3 IP Core in WiGig Environment on Receiving Side”. In: Elleithy K., Sobh T. (eds) New Trends in Networking, Computing, E-learning, Systems Sciences, and Engineering. Lecture Notes in Electrical Engineering, vol 312. Springer, Cham. https://doi.org/10.1007/978-3-319-06764-3_31.
  29. Danijela Efnusheva, Natasha Tagasovska, Aristotel Tentov, Marija Kalendar, “Efficiency comparison of DFT/IDFT algorithms by evaluating diverse hardware implementations, parallelization prospects and possible improvements”, Proceedings of Second International Conference on Applied Innovations in IT, Volume 2, Issue 1, Koethen, Germany, March 2014, pp. 11-20, DOI:10.13142/kt10002.03.
  30. Danijela Efnusheva, Aristotel Tentov, “Integrating processing in RAM memory and its application to high speed FFT computation”, Proceedings of 4th International Conference on Information Society and Technology – ICIST 2014, Serbia, March 9-13, 2014, pp. 382-387.
  31. Danijela Efnusheva, Josif Kjosev, Katerina Raleva, “Exploring the use of Cadence IC in education”, International Journal of Electronics, Volume 17, Number 2, Dec. 2013, pp. 89-94, https://doi.org/10.7251/ELS1317089E.
  32. Danijela Efnusheva, Goce Dokoski, Aristotel Tentov, Marija Kalendar, “Different Approaches for OFDM Transmitter and Receiver Design in Hardware, FPGA Design and Implementation with Performance Comparison”, International Journal of Advanced Research in Computer Science and Software Engineering, Volume 3, Issue 10, October 2013, pp. 1163-1172.
  33. Danijela Efnusheva, Aristotel Tentov, “Hardware implementation of 64-point FFT module in FPGA”, Proceedings of XI International Conference ETAI 2013, Ohrid, Macedonia, September 26-28, 2013, pp. EI-4.
  34. Danijela Efnusheva, Josif Kjosev and Katerina Raleva, “Educational Aspects of Cadence IC”, Proceedings of XI International Conference ETAI 2013, Ohrid, Macedonia, September 26-28, 2013, pp. E3-4.
  35. Riste Oreshkovski, Ilija Dzopkovski, Aristotel Tentov and Danijela Efnusheva, “Practical Approach to 8086 Based Multiprocessor System Design”, Proceedings of XI International Conference ETAI 2013, Ohrid, Macedonia, September 26-28, 2013, pp. EI-6.
  36. Jakimovska, G. Jakimovski, A. Tentov and D. Bojchev, “Performance estimation of parallel processing techniques on various platforms,” 2012 20th Telecommunications Forum (TELFOR), 2012, pp. 1409-1412, doi: 10.1109/TELFOR.2012.6419482.
  37. Danijela Jakimovska, Aristotel Tentov, Goran Jakimovski, Sashka Gjorgjievska, Maja Malenko, “Modern Processor Architectures Overview”, Proceedings of XVIII International Scientific Conference on Information, Communication and Energy Systems and Technologies – ICEST 2012, V. Tarnovo, Bulgaria, June 28-30, 2012, pp. 194-197.
  38. Danijela Jakimovska, Sashka Gjorgjievska, Aristotel Tentov, “Implementation of Intel Microprocessor 8085 in LISA”, Proceedings of Xта International Conference ETAI2011, 16-20 September 2011, Ohrid, R. Macedonia, pp. I3-2.
  39. Sashka Gjorgjievska, Danijela Jakimovska, Aristotel Tentov, “LISA Implementation and Extension of the DLX Processor Architecture”, Proceedings of Xth International Conference ETAI2011, 16-20 September 2011, Ohrid, R. Macedonia, pp. I3-1.
  40. Jakimovska, A. Tentov, S. Gjorgjievska, G. Dokoski, M. Kalendar, “Performance Estimation of Novel 32-bit and 64-bit RISC based Network Processor Cores”, Cyber Journals: Multidisciplinary Journals in Science and Technology, Journal of Selected Areas in Telecommunications (JSAT), May Edition, 2011, pp. 28 – 40.
  41. Marija Kalendar, Danijela Jakimovska, Aristotel Tentov, Goce Dokoski, “Novel Processor Architecture for Modified Advanced Routing in NGN”, Proceedings of 26th ACM Symposium On Applied Computing – ACM SAC 2011, 21-24 March, Taichung, Taiwan, pp. 486 – 491, https://doi.org/10.1145/1982185.1982292.
  42. Jakimovska Danijela, Dokoski Goce, Kalendar Marija, Tentov Aristotel, “Design and HDL implementation of original 64 – bit network processor core”, Proceedings of XVIII Telecommunications Forum – TELFOR 2010, 23-25 November, Belgrde, R.Serbia, pp. 155 – 158.
  43. Kalendar Marija, Jakimovska Danijela, Tentov Aristotel, Dokoski Goce “Advanced Routing Concept Performance Analysis”, Proceedings of XVIII Telecommunications Forum – TELFOR 2010, 23-25 November, Belgrde, R.Serbia, pp. 139 – 142.
  44. Marija Kalendar, Danijela Jakimovska, Goce Dokoski, Aristotel Tentov, “Advanced Routing Concept Supported by a Novel Processor Architecture”, Proceedings of VIII International Symposium on Industrial Electronics – INDEL 2010, 4-6 November, Banja Luka, BiH, pp. 351 – 356.
  45. Danijela Jakimovska, Goce Dokoski, Marija Kalendar, Aristotel Tentov, “Network processor architecture design for multi-gigabit networks”, Proceedings of VIII International Symposium on Industrial Electronics – INDEL 2010, 4-6 November, Banja Luka, BiH, pp. 357 – 362.
  46. Marija Kalendar, Aristotel Tentov, Danijela Jakimovska, Goce Dokoski, “A Novel Flow Based Approach in Routing Decision Mechanism”, Proceedings of 3rd IASTED International Multi-conference on Automation, Control, and Information Technology (ACIT2010), 15-18 June 2010, Novosibirsk, Russia, pp. 158-163, DOI: 10.2316/P.2010.691-026.
  47. Marija Kalendar, Aristotel Tentov, Danijela Jakimovska, Goce Dokoski, “Modified IP Routing Process, Supported by New Network Processor Architecture”, Proceedings of ETRAN 2010, 54th Conference for Electronics, Telecommunications, Computers, Automatic control and Nuclear engineering, 7-11 June 2010, Donji Milanovac, R. Serbia, pp. RT3.7-1-4.
  48. Jakimovska, G. Dokoski, A. Tentov, M. Kalendar, “Network processors: evolution and trends”, Proceedings of IXth National Conference with International Participation ETAI2009, 26-29 September 2009, Ohrid, R. Macedonia, pp. IE2-4.

Participation in projects

  1. “UbiLAB: A ubiquitous virtual laboratory framework” (UbiLAB), Erazmus+ KA2, 2020, Project Coordinator, Dr. Marija Kalendar, UKIM, Skopje, 2021-2023.
  2. “Prediction methods and their application”, 01.01.2022-31.12.2022, funded by UKIM-Skopje, Project Coordinator, Dr. Vesna Andova.
  3. “OBD cloud platform in real time”, 22.12.2020 – 22.06.2021, innovation voucher funded by FITR (Fund for Innovation and Technological Development), Project Coordinator, Dr. Danijela Efnusheva.
  4. “Design and implementation of novel memory-centric processor architecture”, 01.01.2017-31.12.2017, funded by FEEIT-Skopje, Project Coordinator, Dr. Marija Kalendar.
  5. IHP-FEEIT Joint Research Initiative, 01.10.2015-01.10.2016, DFG Grant, Germany, Project coordinator: Prof. Rolf Kraemer, IHP (Frankfurt-Oder) and Univ. of Cottbus, Germany, FEEIT-Skopje, Macedonia.
  6. VISION (Video-oriented UWB-based Intelligent Ubiquitous Sensing) FP7, 2010-2015, European Research Council (ERC) Grant, in the domain of Physical Sciences and Engineering, Project coordinator: Prof. Dajana Cassioli, University L’Aquila, Italy.
  7. “Routing And Traffic control In Next Generation COMputer NETworks”, 01.01.2011-31.06.2012, funded by FEEIT-Skopje, Project Coordinator, Dr. Aristotel Tentov.
  8. “Embedded system design”, 2009-2011, DAAD Grant, Germany, Project coordinator: Prof. Rolf Kraemer, IHP (Frankfurt-Oder) and Univ. of Cottbus, Germany; FEEIT in Skopje, Macedonia; Electronic Faculty in Nis, Serbia; Electrical Engineering Faculty in East Sarajevo, Bosnia.
  9. “Computer support of the script and the language of the Ancient Macedonians”, 2008 – 2010, funded by MANU, Project Coordinator, Dr. Aristotel Tentov.

Participation in applicative projects

  1. Design and implementation of information system: “Evidence for attending classes at FEEIT-Skopje”, 2015-now