Computer System Design with HDL

Објавено: June 28, 2022
1. Course Title Computer System Design with HDL
2. Code 4ФЕИТ07З020
3. Study program КТИ
4. Organizer of the study program (unit, institute, department) Faculty of Electrical Engineering and Information Technologies
5. Degree (first, second, third cycle) First cycle
6. Academic year/semester III/5 7. Number of ECTS credits 6
8. Lecturer D-r Danijela Efnusheva
9. Course Prerequisites Passed: Logic Design
10. Course Goals (acquired competencies): Introduction to techniques and principles of digital design and simulation of computer systems by means of hardware description language. Upon competition of the course, students will be able to:
– use hardware description languages ​​in order to model computer systems and/or components;
– design computer components (processor, ALU, control unit, registers, memory, buses, etc.) with HDL;
– write test-bench programs and simulate computer components described in HDL.
11. Course Syllabus: Introduction to digital design of computer systems in HDL. Introduction to hardware description languages. Comparison of hardware description languages. Introduction to VHDL. Basic building blocks: entities, architecture, ports, signals and variables. Data types. Operator types. Use of standard libraries and packages. Structures for concurrent execution. Structures for sequential execution. Defining processes. Defining state machines. Constructions for hierarchical description of structural systems. Component instantiation. Design configuration. Practical implementation of RISC-based processor in VHDL. Design of ALU unit. Design of control unit and additional control/selection logic. Design of processor registers. Design of program counter and branching logic. Design of pipeline implementation of RISC-based processor in VHDL. Design of pipelined control and data path. Design of memory components in VHDL. Introduction to IP cores. Use of IP cores as building blocks in more complex digital systems. Introduction to software platforms for simulation of digital systems implemented in VHDL. Design of test-bench programs and setting of simulation parameters.
12. Learning methods: Lectures, tasks and exercises and laboratory practice
13. Total number of course hours 2 + 2 + 1 + 0
14. Distribution of course hours 180
15. Forms of teaching 15.1. Lectures-theoretical teaching 30
15.2. Exercises (laboratory, practice classes), seminars, teamwork 45
16. Other course activities 16.1. Projects, seminar papers 0
16.2. Individual tasks 25
16.3. Homework and self-learning 80
17. Grading 17.1. Exams 0
17.2. Seminar work/project (presentation: written and oral) 0
17.3. Activity and participation 10
17.4. Final exam 90
18. Grading criteria (points) up to 50 points 5 (five) (F)
from 51to 60 points 6 (six) (E)
from 61to 70 points 7 (seven) (D)
from 71to 80 points 8 (eight) (C)
from 81to 90 points 9 (nine) (B)
from 91to 100 points 10 (ten) (A)
19. Conditions for acquiring teacher’s signature and for taking final exam Practical (laboratory) exercises
20. Forms of assessment Two partial exams during the semester with a duration of 120 minutes each or one final exam in a corresponding exam session with a duration of 120 minutes. The laboratory exercises are also graded. The final grade includes points from the exam and the laboratory exercises.
It is not allowed to use books, scripts, manuscripts or notes of any kind during the exam, as well as a calculator, mobile phone, tablet or any other electronic device.
21. Language Macedonian and English
22. Method of monitoring of teaching quality Self-evaluation and questionnaires
23. Literature
23.1. Required Literature
No. Author Title Publisher Year
1 David Money Harris, Sarah L. Harris Digital Design and Computer Architecture 2nd Edition Morgan Kaufmann 2013
2 Volnei A. Pedroni Circuit Design and Simulation with VHDL 2nd ed. MIT Press 2010
3 Brock J. LaMeres Quick Start Guide to VHDL Springer 2019
23.2. Additional Literature
No. Author Title Publisher Year
1 Douglas L. Perry VHDL : Programming By Example, Fourth Edition McGraw-Hill 2002
2 Brock J. LaMeres Quick Start Guide to Verilog Springer 2019