1. Course Title | Logic Design | |||||||
2. Code | 4ФЕИТ05З022 | |||||||
3. Study program | КХИЕ,КТИ,КСИАР | |||||||
4. Organizer of the study program (unit, institute, department) | Faculty of Electrical Engineering and Information Technologies | |||||||
5. Degree (first, second, third cycle) | First cycle | |||||||
6. Academic year/semester | II/3 | 7. Number of ECTS credits | 6 | |||||
8. Lecturer | D-r Katerina Raleva, D-r Danijela Efnusheva | |||||||
9. Course Prerequisites | ||||||||
10. Course Goals (acquired competencies): Knowledge of the fundamentals of digital logic design (principles and laws for analysis and design of logic circuits). Able to analyze and design logic circuits and logic systems: – Translating a simple logic problem described textually to a combinational logic function. – Designing combinational circuits using common building blocks (logic gates, multiplexers, demultiplexers, decoders, encoders). – Designing flip-flop, register, and counter circuits. – Implementing a finite state machine from written specifications. |
||||||||
11. Course Syllabus: Numeral systems and codes. Fundamentals of Boolean and switching algebra. Basic logic gates. Logic variables and expressions, logic functions. Implementation of logic functions with basic logic gates. Implementation of logic functions with NAND and NOR gates. Techniques for minimization of logic functions. Karnaough map. Analysis and synthesis of logic functions. Combinational logic (multiplexer, demultiplexer, decoder, encoder, code converters). Combinational logic design. ROM and other programmable LSI logic devices ( PAL, GAL, PLA). Implementation of logic functions using ROM or PLA. Introduction to sequential logic. Storage elements – latches, flipflop and registers. Asynchronous and synchronous counters. Synchronous sequential logic as a finite state machine (FSM). Moore and Mealy synchronous sequential logic. Procedure for FSM design. | ||||||||
12. Learning methods: Blended teaching method: lecturing, tutorials supported by presentations and visualization of concepts, active participation of students through tests and assignments, all supported by learning management system | ||||||||
13. Total number of course hours | 3 + 1 + 1 + 0 | |||||||
14. Distribution of course hours | 180 | |||||||
15. Forms of teaching | 15.1. Lectures-theoretical teaching | 45 | ||||||
15.2. Exercises (laboratory, practice classes), seminars, teamwork | 30 | |||||||
16. Other course activities | 16.1. Projects, seminar papers | 0 | ||||||
16.2. Individual tasks | 15 | |||||||
16.3. Homework and self-learning | 90 | |||||||
17. Grading | 17.1. Exams | 30 | ||||||
17.2. Seminar work/project (presentation: written and oral) | 0 | |||||||
17.3. Activity and participation | 10 | |||||||
17.4. Final exam | 60 | |||||||
18. Grading criteria (points) | up to 50 points | 5 (five) (F) | ||||||
from 51to 60 points | 6 (six) (E) | |||||||
from 61to 70 points | 7 (seven) (D) | |||||||
from 71to 80 points | 8 (eight) (C) | |||||||
from 81to 90 points | 9 (nine) (B) | |||||||
from 91to 100 points | 10 (ten) (A) | |||||||
19. Conditions for acquiring teacher’s signature and for taking final exam | Lectures and tutorials attendance and successful completion of lab exercises. | |||||||
20. Forms of assessment | During the semester, two partial written exams are provided (at the middle and at the end of the semester, lasting 120 minutes) and a test of laboratory exercises (after the exercises). The points from the partial exams and the points from the laboratory exercises are included in the final grade. In the planned exam sessions, a written exam is taken (duration 180 minutes). The points from the written exam and the points from the laboratory exercises are included in the final grade. It is not allowed to use books, scripts, manuscripts or notes of any kind during the exam, as well as a calculator, mobile phone, tablet or any other electronic device. |
|||||||
21. Language | Macedonian and English | |||||||
22. Method of monitoring of teaching quality | Internal evaluation and surveys. | |||||||
23. Literature | ||||||||
23.1. Required Literature | ||||||||
No. | Author | Title | Publisher | Year | ||||
1 | N. Balabanian, B. S. Carlson | Digital Logic Design Principles | John Wiley & Sons, Inc. | 2001 | ||||
2 | М. Морис Мано, Мајкл Д. Цилети | Дигитален дизајн | Арс Ламина (превод на македонски) | 2010 | ||||
3 | M. Morris Mano and Michael D. Ciletti | Digital Design | Pearson (Prentice Hall) | 2007 | ||||
23.2. Additional Literature | ||||||||
No. | Author | Title | Publisher | Year | ||||
1 | McCluskey, E.J. | Logic Design Principles | Prentice Hall | 1986 |