Techniques for HDL design and FPGA implementation

Објавено: април 23, 2021

Course: Techniques for HDL design and FPGA implementation

Code: 3ФЕИТ07022А

ECTS points: 6 ECTS

Number of classes per week: 3+0+0+3

Lecturers: Dr Danijela Efnusheva, Dr Tatjana Nikolikj

Course Goals (acquired competencies): Acquiring knowledge of designing digital electronic components in HDL – Hardware Description Languages. Acquiring knowledge of appropriate software environments for HDL design and simulation. Work with FPGA components.

Course Syllabus: Digital systems design, implementation and application. HDL – Hardware Description Languages: VHDL, Verilog, System C. Using IP-cores for digital systems design. System-on-chip design with HDL. Description of processors in HDL. Description of busses in HDL. Energy-efficient embedded systems design. Design of communication for embedded computer systems.  FPGA architecture. Use of CAD tools dedicated to FPGAs from different vendors: Xilinx, Altera. Design and simulation of digital systems with CAD tools. Programming of FPGA devices. Application of digital systems, implemented in FPGA.

Literature: 

   Required Literature
Author Title Publisher Year  
Joao M. P. Cardoso,Michael Hubner “Reconfigurable computing: from fpgas to hardware/software codesign" Springer-Verlag 2011  
Eduardo Augusto Bezerra, Djones Vinicius Lettnin Synthesizable VHDL Design for FPGAs Springer 2014  
Cem Unsalan, Bora Tar Digital System Design with FPGA: Implementation Using Verilog and VHDL Mc Graw Hill 2017